1. Field of the Invention
The present invention relates generally to digital signal processing. More particularly, the present invention relates to rate matching and de-rate matching using digital signal processing.
2. Background
Wireless communication systems include a network infrastructure having base stations throughout a coverage area, each of which is dedicated to a cell or cell site. The base stations are controlled by base station controllers that further communicate with a mobile switching center.
The wireless networks operate according to a number of standards including Code Division Multiple Access (CDMA) standards and the Universal Mobile Telecommunications Services (UMTS) including the Wideband CDMA (WCDMA) and Long Term Evolution (LTE) standards. These standards support high throughput for both voice and data.
Networks employ a variety of techniques to guard against signal loss during signal transmission over a data channel. One technique is to use a rate matching algorithm for each block of data that is sent over a channel to ensure that the transmission rate is matched from end to end. Each block of data may be represented by a code word. The code word may be punctured or repeated before being sent over the physical channel.
The rate matching algorithm may only supply a single code word. For Hybrid Automatic Repeat Request (HARD) systems, different versions of the codeword may be provided by the rate matching algorithm,
Several techniques are known to perform rate matching. The 3rd Generation Partnership Project (3GPP) has defined several combinations of block size and code rates. Accordingly, defining puncturing or repetitive patterns for each combination is not practical. In addition, a large number of information block sizes and code rate combinations may be found in such as in a communication system.
Further, in communication technologies, such as the High Speed Packet Access (HSPA), which are standardized by 3GPP, when transmitting encoded data, HSPA employs a turbo code having a coding rate of ⅓ to generate 2 parity bits and one systematic per bit of information. Puncturing or repetition of bits may then be performed. A receiver performs error correction decoding on a bit sequence after the rate matching process.
Generally, the above methods are highly inefficient and consume a large amount of processing power. For example, a direct implementation of a puncturing function for rate matching may utilize most, if not all available, processing power of a general computation unit while attempting to perform rate matching or de-rate matching of a bit stream bandwidth.
Accordingly, there is a need to overcome the drawbacks and deficiencies by providing systems and methods for efficient and cost effective rate matching and de-rate matching on digital signal processors.